Hands-on DV labs with real SystemVerilog, UVM, and protocol testbenches — run them live on EDA Playground
Run these testbenches live in your browser — no local tool install needed. Click any card to open the ready-made EDA Playground workspace in a new tab.
📝 Before you start: Create a free account at EDA Playground and verify your email. If your university or employer provides EDA Playground institution credentials, log in with those instead of the free tier — it unlocks the full UVM class library and additional simulator/compiler licenses (e.g. Synopsys VCS, Cadence Xcelium) that aren't available anonymously.
Combinational multiplier DUT with a self-checking testbench — a great warm-up before tackling protocol-level UVM environments.
Serial transmit/receive DUT with a testbench exercising baud timing, framing, and back-to-back byte transfers.
Master/slave SPI DUT covering clock polarity/phase modes, multi-byte transfers, and chip-select handling.
Two-wire I2C controller/target DUT with a testbench checking start/stop conditions, ACK/NACK, and clock stretching.
Full AXI environment ready to run live — a companion to the UVM AXI4-Lite project above, runnable directly in the browser.
Runnable APB environment ready to explore live — pairs with the APB Protocol Assertion Checker project above.
Review the underlying concepts before you dive into the labs above — protocols, UVM, and assertions are all covered.